DDR3 Memory Timings Explained | MSI HQ User-to-User FAQ edit / delete

Useful when you're trying to understand what all the settings on the Allwinner DRAM controller are for.

to allwinner ddr dram memory ram ... on 03 May 2015

Revisiting FullHD X11 desktop performance of the Allwinner A10 edit / delete

Looking, in detail, into how the CPU and GPU contend for memory on the A10 -- and why some A10 machines (particularly with 16-bit memory) struggle with high resolutions. This is lovely stuff -- it's like talking about the Spectrum all over again!

to allwinner arm contention dram embedded memory performance video ... on 14 November 2014

Axiomatic validation of memory barriers and atomic instructions [LWN.net] edit / delete

More progress on model checking for memory models on modern processors. The tool described here covers ARM, Power and x86 memory models, and does efficient analysis of (smallish) chunks of code.

to arm atomic concurrency herd intel memory memory-model model-checking power static-analysis x86 ... on 28 August 2014

Modern Microprocessors - A 90 Minute Guide! edit / delete

This covers nearly all of the architecture side of AG0803, and some more stuff besides; a nice overview.

to ag0803 architecture cpu memory performance pipelining superscalar ... on 24 August 2014

A concrete illustration of practical running time vs big-O notation - The Old New Thing - Site Home - MSDN Blogs edit / delete

One for AG0803 students: why algorithmic complexity isn't everything in a world with complex memory architectures.

to ag0803 complexity data-structures memory optimisation performance ... on 13 August 2014

A dangling pointer is indeterminate | TrustInSoft edit / delete

Well, that's an interesting bit of the C standard: "free(m); if (m == NULL) ..." is undefined behaviour...

to c language-design memory semantics undefined ... on 15 July 2014

Reasoning About the Heap in Rust edit / delete

Quote: "it's still worth applying Separation logic to get a feel for what's happening to the heap". I'm kind of impressed that the Rust designers have managed to come up with a design for reference types that's *more* complex than C++'s.

to formal-methods language-design memory reference rust separation-logic ... on 03 May 2014

Blosc edit / delete

"Blosc is a high performance compressor optimized for binary data. It has been designed to transmit data to the processor cache faster than the traditional, non-compressed, direct memory fetch approach via a memcpy() OS call." This is very neat -- it's a compressed data format designed so that you can decompress it into cache very quickly. AG0803 students take note!

to ag0803 cache compression memory optimisation python ... on 28 April 2014

gdb-heap edit / delete

Memory usage tracking for GDB. "gdb-heap is different in that it allows for unplanned memory usage debugging: if a process unexpectedly starts using large amounts of memory you can attach to it with gdb, and use a new heap command to figure out where the memory is going."

to debugging gdb heap memory performance ... on 28 April 2014

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